org.graalvm.compiler.lir.amd64.vector

Interface AVX512Support

All Known Implementing Classes:

AMD64VectorBlend.EvexBlendOp, AMD64VectorGather.EvexVectorGatherOp, AMD64VectorShuffle.ConstPermuteBytesUsingTableOp, AMD64VectorShuffle.ShuffleWordOpWithMask, AMD64VectorUnary.AVXBroadcastOp

public interface AVX512Support

Method Summary

Modifier and Type	Method and Description
AllocatableValue	getOpmask() Denotes the optional opmask register that allows additional masking for write operations.
default Register	getOpmaskRegister() Safely determines the register to use for the opmask operand of the instruction.

Method Detail

getOpmask

AllocatableValue getOpmask()

Denotes the optional opmask register that allows additional masking for write operations. The Value.getValueKind() should correspond to the operand registers in such a way that all lanes may be masked (e.g. 8 bits for 512 bit QWORDs in a ZMM register). May be Value.ILLEGAL if no register should be used.

Returns:

a register that contains the opmask operand or Value.ILLEGAL

getOpmaskRegister

default Register getOpmaskRegister()

Safely determines the register to use for the opmask operand of the instruction. If no register is specified (Value.ILLEGAL), no opmask register (Register.None) is returned.

Returns:

the register for the opmask operand